Reihe Design, Test and Verification of Embedded Systems

Test and Diagnosis of Embedded Processor Cores with Formal Methods

Bekannte Unbekannte - Formale Methoden in Anwesenheit unbekannter Werte.

On the Handling of Uncertainty in Test Pattern Generation

Verifikation unvollständiger Schaltkreise

Verifying Real-Time Systems

Testing Time - Time to Test? – Using Formal Methods for the Timing Analysis of Digital Circuits. Design, Test and Verifi

Über Craigsche Interpolation und deren Anwendung in der formalen Modellprüfung

Efficiency and Applications of SAT-Based Test Pattern Generation - Complex fault models and optimisation problems.